Sequence Instruction Set

General Description

Sequence instructions have op codes that are 1 byte long. Most instructions have 1, 2, or 3 operands. A few have 0 and one (SETREGS) have a variable number of operands. In most cases, operands may be immediate or register. In general, bits 3,2, and 1 indicate the type of operands 1, 2, and 3 respectively. A 1 indicates immediate while a 0 indicates register. Instructions that contain address references, e.g., branch instructions, interpret the operand as an address in sequence space. If the operand is a register, it is defined by a single byte; otherwise, the operand is defined by 2 bytes. All branch addresses are bound checked prior to execution. The section that follow define sequencer instructions in functionally related groups. In the tabular descriptions, & indicates sequence space address, R indicates register, and I indicates immediate value. Arithmetic instructions contain 3 operands; a destination operand and two source operands. The operands may be register or immediate. Table 3 SUMMARIZES arithmetic instructions.

Instruction	Opcode	Type			Description
Instruction	Opcode	OP1	OP2	OP3	Description
ADD	01	R	R	R	OP1 = OP2 + OP3
	03	R	R	I
	05	R	I	R
	07	R	I	I
SUB	11	R	R	R	OP1 = OP2 - OP3
	13	R	R	I
	15	R	I	R
	17	R	I	I
MUL	21	R	R	R	OP1 = OP2 * OP3 (The upper 16 bits of the multiplication result are placed in register 199).
	23	R	R	I
	25	R	I	R
	27	R	I	I
DIV	31	R	R	R	OP1 = OP2 / OP3
	33	R	R	I
	35	R	I	R
	37	R	I	I
INC	C6	R			OP1 = OP1 + 1
DEC	D0	R			OP1 = OP1 - 1

Table 3 Arithmetic Instructions

Branch Instructions

Branch instructions contain 3 operands; a branch address, a reference operand, and a test operand. The branch address may be a register or immediate. The operands may be register or immediate. Table 4 Summarizes branch instructions.

Instruction	Opcode	Type			Description
Instruction	Opcode	OP1	OP2	OP3	Description
BEQ	00	R	R	R	Branch to OP1 if OP2 == OP3
	02	R	R	I
	08	&	R	R
	0A	&	R	I
BNE	10	R	R	R	Branch to OP1 if OP2 != OP3
	12	R	R	I
	18	&	R	R
	1A	&	R	I
BLT	20	R	R	R	Branch to OP1 if OP2 < OP3
	22	R	R	I
	28	&	R	R
	2A	&	R	I
BLE	30	R	R	R	Branch to OP1 if OP2 <= OP3
	32	R	R	I
	38	&	R	R
	3A	&	R	I
BGT	40	R	R	R	Branch to OP1 if OP2 > OP3
	42	R	R	I
	48	&	R	R
	4A	&	R	I
BGE	50	R	R	R	Branch to OP1 if OP2 >= OP3
	52	R	R	I
	58	&	R	R
	5A	&	R	I
BNZ	82	R	R		Branch to OP1 if OP2 != 0
BNZ	86	&	R		Branch to OP1 if OP2 != 0
BZ	90	R	R		Branch to OP1 if OP2 == 0
BZ	98	&	R		Branch to OP1 if OP2 == 0
UBR	C2	&			Go To OP1
UBR	CA	&			Go To OP1

Table 4 Sequencer Branch Instructions

Sequence Related Instructions

This section describes instructions associated with sequence initiation, identifications and termination. The Call instruction (CLL) transfers control to another sequence. Upon completion of the called sequence, processing resumes at the instruction following the call. CLL is a two operand instruction where OP1 contains the low word of the sequence ID while OP2 contains the high word. The call stack is 10 deep. SID and VID instructions define sequence ID's. The SID instruction places the ID in housekeeping telemetry while VID does not. Both skip the 2 bytes following the ID. RET, EXIT, TERM, and ABORT instructions stop the current sequence. RET and EXIT end the sequence normally (EXIT sets the $RTN built-in). If the NewSequence command that started this sequence has additional sequences, the next in the one in the list starts. TERM terminates this sequence and any others started with the same command, but will start any pending NewSequence. ABORT terminates this sequence and will not start a pending NewSequence command if there is one. Table 5 defines sequence related instructions.

Instruction	Opcode	Type			Description
Instruction	Opcode	OP1	OP2	OP3	Description
CLL	81	R	R		Call Sequence with ID [OP1,OP2]
	85	R	I
	89	I	R
	8D	I	I
SID	A0	R	R	I	Set Sequence ID Note: For the sequencer to "find" a sequence, it must start with a VID or a SID with the AC OpCode. OP3 always points to the next sequence ID.
	A4	R	I	I
	A8	I	R	I
	AC	I	I	I
VID	E1	I	I	I	Virtual ID
RET	E0				Return to sequencer
EXIT	B1	R			Same as RET except that $RTN is set to OP1
EXIT	B9	I			Same as RET except that $RTN is set to OP1
TERM	E2				Terminate sequence and all others in NewSequence
ABORT	E4				Abort this, all in NewSequence, and Pending

Table 5 Sequence Related Instructions

Time Related Instructions

These instructions that relate to sequence timing. Wait returns to the sequencer the specified number of ticks. 0 and 1 both wait 1 tick. A tick is 50 milliseconds. Delay returns to the sequencer until the specified number of ticks since the previous delay. If that time has already passed, the sequence advances immediately without returning to the sequencer. Delay time is pushed on a CLL and restored upon return. SRT sets an internal parameter called the reference time (RefTime) to the current local on-board time (LOBT) in seconds. TIM returns to the sequencer until LOBT is greater than of equal to RefTime + OP1. The argument to the time instruction is in seconds. NOOP does nothing but absorb one sequence instruction time. Table 6 defines this group of instructions.

Instruction	Opcode	Type			Description
Instruction	Opcode	OP1	OP2	OP3	Description
WAIT	B4	R			Wait OP1 Ticks
WAIT	BC	I			Wait OP1 Ticks
DELAY	B2	R			Wait OP1 Ticks from Previous Delay
DELAY	BA	I			Wait OP1 Ticks from Previous Delay
SRT	E8				Set RefTime to current LOBT
TIM	B0	R			Wait until OP1 seconds since SRT.
TIM	B8	I			Wait until OP1 seconds since SRT.
NOOP	FF				No Operation

Table 6 Time Related Instructions

Assignment Instructions

This group of instructions sets register to values. SET sets a register to a value. SETREGS sets a block of registers to a block of values. LDA sets the register in OP1 using OP2 as a pointer. The address base for LDA is the CC data segment, i.e., one can load a register with any location in CC memory. LDR sets a register to the value of another register and increments the source register. Table 7 defines assignment instructions.

Instruction	Opcode	Type			Description
Instruction	Opcode	OP1	OP2	OP3	Description
SET	80	R	R		OP1 = OP2
SET	84	R	I		OP1 = OP2
SETREGS	83	R	R		OP1 contains a destination register number. OP2 contains the number of registers (N). The next N words in the sequence are the value to which the registers are set.
	87	R	I
	8B	I	R
	8F	I	I
LDA	A1	R	R		OP1 gets value of address defined by OP2 (OP1=*OP2) (OP2 is referenced to CC data segment)
LDA	A5	R	I
LDR	A3	R	R		OP1 gets value of register defined by OP2 and OP2 is incremented (OP1=*OP2++)

Table 7 Assignment Instructions

Observing Related Instructions

The instruction in this group are those that directly interact with the main CC code and the DHC to take images and control the instrument. The coding of each instruction and a brief description are contained in Table 8. The subsections that follow describe each observing instruction in some detail.

Instruction	Opcode	Type			Description
Instruction	Opcode	OP1	OP2	OP3	Description
FRAME	C0	R			Take a Picture
FRAME	C8	I
FRMPF	70	R	R	R	Take a picture including PZT and Focus
	72	R	R	I
	74	R	I	R
	76	R	I	I
	78	I	R	R
	7A	I	R	I
	7C	I	I	R
	7E	I	I	I
SAMP	91	R	R		Set camera amplifier and offset
	95	R	I
	99	I	R
	9D	I	I
STTG	83	R	R		Set pointing target
	87	R	I
	8B	I	R
	8F	I	I
LOCKBUF	EC				Lock current buffer
RESETAEC	EE				Reset automatic exposure parameters
STARTAVE	F0				Start time average
UPDIMAX	F2				Update IMAX coordinates

Table 8 Observing Instructions

Frame Instruction (FRAME and FRMPF)

The FRAME instructions (FRAME and FRMPF) configure the instrumentation and take a picture. The operand to the FRAME is the Frame Identifier (FID). The operands the FRMPF are the FID, a PZT offset (PZTO), and the focus offset (FO). FID is ID of a frame definition block (FDB) . The sequencer locates the FDB in the frame table based on the upper 13 bits of the FID. The lower 3 bits are available as a revision code. Paragraph 0 contains a detailed description of the FDB. PZTO is an index to the PZT Offset Table. Entry 0 in the PZT offset table contains the nominal PZT positions. PZTO is used for calibrations and sub-pixel pointing. Focus is set to the default focus position for the wavelength specified in the FDB. FO is a signed offset from the nominal position for the wavelength.

When the sequencer executes a FRAME or FRMPF instruction, it sets various parameters that are used by the CC and DHC to realize the requested image. These parameters are derived from the FDB, FO, and PZTO as well as the current state of the instrument. The sequencer then returns to the CC. The sequence advances to the next instruction once the event detection portion of the DHC program (phase I) is complete. If a NewSequence command is received during a FRAME instruction, the sequence start is deferred until the picture taking process is complete. The sequence proceeds even if there is a DHC error or a picture state machine timeout.

Set Amplifier and Offset (SAMP)

The SAMP instruction selects the CCD amplifier and ADC OFFSET. A zero in either parameter indicates do not change. Amplifier is the first operand while ADC offset is the second. The sequencer sets parameters in camera control table, and the CC uses these for the next picture. The sequencer does not return to the CC when it executes the SAMP instruction.

Set Target Instruction (STTG)

The set target instruction acquires target parameters from the pointing control table using the pointing ID specified in the instruction. The ID is 32 bits. The sequencer looks up the ID in the Pointing Control Table (PCT) based on the high order 24 bits. The lower eight are available for revision control. If there are several targets with the same ID, the last is used. OP1 contains the lower word of the target ID while OP2 contains the upper word. The sequencer transfers the wedge positions associated with the requested ID to a request bytes used by the CC. The sequencer returns to the main CC code. The sequence resumes once the slew flag is zero. The slew flag becomes zero right after the CC has issued the last wedge move command. Three seconds or less after this, the spacecraft should be at the target. If a NewSequence command is received during the STTG instruction, the sequence start is deferred until the slew flag is 0.

Lock Flare Buffer Instruction (LOCKBUF)

LOCKBUF sets the status of the current flare buffer to locked. It decrements $NBF and sets $CBF to the next available buffer. If there is no current flare buffer, LOCKBUF has no effect.

Reset Automatic Exposure Control Instruction (RESETAEC)

The AEC reset instruction sets the current automatic exposure level in each of the 128 AEC entries to default value for that entry.

Start Time Average (STARTAVE)

STARTAVE sets a parameter that forces the T0 parameter in the Image Processing Block to 1 on the next frame whose FDB has time averaging enabled.

Update IMAX (UPDIMAX)

UPDIMAX computes the IMAX row and column from the most recent value in the data transfer buffer. IMAX update happens automatically if the MX flag is set in the FDB. This instruction handles cases where the MX was not set but an event has occurred and the sequence requires that the coordinates of the event become the new IMAX.