The following instructions have been defined for the TRACE sequencer. The operand codes are;
The opcodes assignments reflect the number and types of operands required by the instructions. This facilitates both the compilation and decoding process. It allows the usage of the same instruction mnemonic even when different operand types are specified. The compiler can generate the appropriate opcode by setting the operand bits according to the following scheme;
Bit 3 indicates the type (Immediate-address or Register) of 1st operand reading from left to right. Bits 2 and 1 indicate the type of the second and third operands respectively. Bit 0 is reserved for extension (if needed).
| Instruction | OP1 | OP2 | OP3 | Opcode | Hex | Description |
|---|---|---|---|---|---|---|
| BEQ | &/R | R | R/I | 0000a0c0 | 00 | if (op2 == op3) goto op |
| BNE | &/R | R | R/I | 0001a0c0 | 10 | if (op2 != op3) goto op1 |
| BLT | &/R | R | R/I | 0010a0c0 | 20 | if (op2 < op3) goto op1 |
| BLE | &/R | R | R/I | 0011a0c0 | 30 | if (op2 <= op3) goto op1 |
| BGT | &/R | R | R/I | 0100a0c0 | 40 | if (op2 > op3) goto op1 |
| BGE | &/R | R | R/I | 0101a0c0 | 50 | if (op2 >= op3) goto op1 |
| FRMPF | R/I | R/I | R/I | 0111abc0 | 70 | SET FDB(OP1), PZTO(OP2), Focus(OP3) |
| ADD | R | R/I | R/I | 00000bc1 | 01 | op1 = op2 + op3 |
| SUB | R | R/I | R/I | 00010bc1 | 11 | op1 = op2 - op3 |
| MUL | R | R/I | R/I | 00100bc1 | 21 | op1 = op2 * op3 (LSW) R_ovfl = (MSW) |
| DIV | R | R/I | R/I | 00110bc1 | 31 | op1 = op2 / op3 (op1 = 0 if op3 = 0) |
Unused Codes: 41, 51, 60, 61, 70, 71
| Instruction | OP1 | OP2 | OP3 | Opcode | Hex | Description |
|---|---|---|---|---|---|---|
| SET | R | R/I | - | 10000b00 | 80 | op1 = op2 |
| BNZ | &/R | R | - | 1000a010 | 82 | if (op2 != 0) goto op1 |
| BZ | &/R | R | - | 1001a000 | 90 | if (op2 == 0) goto op1 |
| TIMCHK | R/I | R | - | 1001a010 | 92 | op2 = -1|0|1 if MarkTime <|=|> LOBT |
| SID | R/I | R/I | - | 1010ab00 | 80 | Set sequence ID |
| DEV | R/I | R/I | - | 1010ab10 | A2 | Command device op1 to perform function op2 |
| CLL | R/I | R/I | - | 1000ab01 | 81 | Call Seq with ID [OP1,OP2] |
| SAMP | R/I | R/I | - | 1001ab01 | 91 | Set Amplifier and ADC Offset |
| LOAD | R | R/I | - | 10100b01 | A1 | *(SeqReg+op1) = *(op2) |
| STTG | R/I | R/I | - | 1000ab11 | 83 | Set Target to pointing index op1 |
| SETREGS | R/I | R/I | - | 1001ab11 | 93 | Set a block of registers |
Unused Codes: A3
| Instruction | OP1 | OP2 | OP3 | Opcode | Hex | Description |
|---|---|---|---|---|---|---|
| TIM | R/I | - | - | 1011a000 | B0 | if (LOBT >= op1) continue |
| DELAY | R/I | - | - | 1011a010 | B2 | wait for op1 tics since last DELAY |
| WAIT | R/I | - | - | 1011a100 | B4 | Wait for op1 tics |
| EXIT | R/I | - | - | 1011a001 | B1 | Ends current seq; equiv to ret for called seq |
| FRAME | R/I | - | - | 1100a000 | C0 | Configure filters/shutter/DHC proc block |
| UBR | &/R | - | - | 1100a010 | C2 | goto op1 |
| INC | R | - | - | 11000110 | C6 | op1 += 1 |
| DEC | R | - | - | 11010000 | D0 | op1 -= 1 |
Unused Codes: B3, B5, B6, B7, C1, C3, C4, C5, C7, D1, D2, D3, D4, D5, D6, D7
| Instruction | OP1 | OP2 | OP3 | Opcode | Hex | Description |
|---|---|---|---|---|---|---|
| RET | - | - | - | 11100000 | E0 | return |
| TERM | - | - | - | 11100010 | E2 | Terminate Seq; Begin Pending (if any) |
| ABORT | - | - | - | 11100100 | E4 | Terminate Seq; Ignore Pending |
| SRT | - | - | - | 11101000 | E8 | RefTime = LOBT Seconds |
| TAP | - | - | - | 11101010 | EA | Take a picture |
| LOCKBUF | - | - | - | 11101100 | EC | Lock current flare buffer |
| RESETAEC | - | - | - | 11101110 | EE | Reset AEC to default for all wavelengths |
| STARTAVE | - | - | - | 11110000 | F0 | Start Time weighted average |
| UPDIMAX | - | - | - | 11110010 | F2 | Update IMAX coordinates |
| NOOP | - | - | - | 11111111 | FF | No Operation |
Unused Codes: E1, E3, E5, E6, E7, E9, EB, ED, EF F1, F3-FE