PROC TI_dhc_qp12d


;# File: QQP_12d.src
;#
;program "%Z% MODULE: %M% RELEASE: %R%.%L% CREATED: %G% %U%"
;source "load_QP12d.src"
;descr "load_QP12d - Loads DHC queue patch 12d"

;# Stop Sequence
/ICSQSTOP

;# Wait for last data output to finish
wait until (ikiperst .EQ. 0x3800)
wait 6.0
wait until (ikiperst .EQ. 0x3800)

;# Disable Queue
/ICDHLDIN wc=1, w1=0x0154

;# Load patch data
;####### Patch File QQP_12d.src  ######
;# File: QQP_12d.src
;#
;#=======================================================
;#
;#
;#  File QQP_12d.src (From QQP_12d.dhs)
;#  This file contains the dhc code required to generate queue ver
;#  version 12a (or 129).
;#
;#  The patch contains the following modifications:
;#
;#  1.  Adjust AEC Hi and Low counts for camera mode.
;#
;#  Rationale:
;#  There is a flaw in the AEC system in that the number of counts
;#  with a level is not adjusted for camera summing mode.  Since i
;#  difficult to patch the CC code in this area, we are patching t
;#  This is a bit of a Kludge and may be revised if the CC code is
;#
;#  Method;
;#  Create a new routine (RSHFT1) that performs a 32 bit right shi
;#  value in a specific location as the address of the value.  The
;#  returned to that location.
;#
;#  Create another routine (RSHFTN) which calls RSHFT1 a number of
;#  a fixed location register.  The register contents is destroyed
;#
;#  Create another routine (AECADJ) which does the following:
;#    Extract the camera mode from the FDB section of the IPB
;#    Use the new shift routine to adjust the counts based on the 
;#       mode=1... shift 2; mode=2 ... shift 4;  mode=3... shift 6
;#
;#  At the start of the AEC section of HistSub:
;#    Insert code to move the AEC High and low counts to a scratch
;#    Insert a call to AECADJ at the start of the AEC section of H
;#    Insert code to replace existing code that adjust AEC High co
;#    to 1/8% ( The replacement code is shorter than the existing 
;#    Move AECADJHI back to AECTEMP to reuse in place code
;#    Insert a goto to skip over unused code.
;#
;#  Change the COMPLONG instruction for AEC Lo test To use new loc
;#
;#  Add a couple of literals to support the shift (8000 and 7FFF).
;#
;#  Modify the version number.
;#
;#  Additional note:
;#
;#  The location for the adjust bin counts is in the unused portio
;#  DP header so that I can have visibility for test.
;#  
;#
;#  This (.src) code has been generated by writing a dhc source fi
;#  processing it by the DHC linker (dhclnk).
;#
;#
;#
;#
;#
;# Generate the register addresses for the AEC counts and the
;# Temp used by RSHFT1
;#
;#REGBLK 0x100         DP_HDR[505]
;#REGEQU $DP_HDR+3     CC_INBLK
;#REGEQU $CC_INBLK+291 FDB
;#REGEQU $FDB+1        FDB_CMMODEWORD
;#REGEQU $CC_INBLK+307 IPB
;#REGEQU $IPB+20       IPB_AEHC
;#REGEQU $IPB+23       IPB_AELC
;#REGEQU $DP_HDR+440   VR12DTEMP
;#REGEQU $VR12DTEMP    AECADJHI
;#REGEQU $VR12DTEMP+2  AECADJLO
;#REGEQU $VR12DTEMP+4  AECADJCMMODE
;#REGEQU $VR12DTEMP+5  SHFTTEMP
;#REGEQU $VR12DTEMP+5  SHFTTEMPLO
;#REGEQU $VR12DTEMP+6  SHFTTEMPHI
;#REGEQU $VR12DTEMP+7  SHFTTEMPXX
;#REGEQU $VR12DTEMP+8  SHFTTEMPN
;#REGEQU $VR12DTEMP+9 SHFTTEMPADD
;#
;# This gets me register addresses I need
;#
;#.RORG  P1H  0x55F
;#REGDEF $P1H P1HIST	
;#REGEQU $P1HIST+8   P1_COMPTEST  
;#REGEQU $P1HIST+12  AECTEMP  
;#
;#.ORG 0x3D5
;#
;# This code overlays the existing code that starts the AEC
;# process.  The existing code starts with adjusting the AEC
;# high counts to reflect 1/8% units (shift -3).  The new code
;# call the AECADJ routine, then replaces the shift -3 code
;# with a call to a new general purpose right shift function.
;#
;#COPYRD2D   $IPB_AEHC $AECADJHI 2	; transfer the counts to
/ICDHCMD wc=5,w1=0x91,w2=0x03D5,w3=0x0144,w4=0x024A,w5=0x02B8,w6=0x0002
;#COPYRD2D   $IPB_AELC $AECADJLO 2	; New location
/ICDHCMD wc=5,w1=0x91,w2=0x03D9,w3=0x0144,w4=0x024D,w5=0x02BA,w6=0x0002
;#CALLQUE   &AECADJ		; Adjust AEC for camera mode.
/ICDHCMD wc=3,w1=0x91,w2=0x03DD,w3=0x01F8,w4=0x1D00
;#SETREG    $SHFTTEMPADD  $AECADJHI ; setup to shift high count
/ICDHCMD wc=4,w1=0x91,w2=0x03DF,w3=0x0140,w4=0x02C1,w5=0x02B8
;#SETREG    $SHFTTEMPN 3            ; minus 3 (1/8% solution)
/ICDHCMD wc=4,w1=0x91,w2=0x03E2,w3=0x0140,w4=0x02C0,w5=0x0003
;#CALLQUE   $RSHFTN
/ICDHCMD wc=3,w1=0x91,w2=0x03E5,w3=0x01F8,w4=0x1D22
;#COPYRD2D  $AECADJHI $AECTEMP 2 ; patch is easily if move this bac
/ICDHCMD wc=5,w1=0x91,w2=0x03E7,w3=0x0144,w4=0x02B8,w5=0x056B,w6=0x0002
;#GOTO      0x3F1			; Code shortened
/ICDHCMD wc=3,w1=0x91,w2=0x03EB,w3=0x0156,w4=0x03F1
;#
;# This little fragment changes the complong for the AEC low test 
;# The location to which the counts have been moved (AECADJLO)
;#.ORG 0x0407
;#
;#COMPLONG  $AECADJLO $P1_COMPTEST  0x040D 0x0413 0x0413
/ICDHCMD wc=5,w1=0x91,w2=0x0407,w3=0x0176,w4=0x02BA,w5=0x0567,w6=0x040D
/ICDHCMD wc=3,w1=0x91,w2=0x040B,w3=0x0413,w4=0x0413
;#
;# insert the code just before the previous patch
;#
;#.ORG 0x1D00
;#
;# This routine adjust the AEC High and Lo counts for
;# summing camera modes
;#
;#AECADJ:
;#SHIFT      $FDB_CMMODEWORD $AECADJCMMODE $LITERALMINUS13
/ICDHCMD wc=5,w1=0x91,w2=0x1D00,w3=0x018A,w4=0x0227,w5=0x02BC,w6=0x083C
;#REGAND     $AECADJCMMODE   $LITERAL7     $AECADJCMMODE
/ICDHCMD wc=5,w1=0x91,w2=0x1D04,w3=0x0150,w4=0x02BC,w5=0x083A,w6=0x02BC
;#BRANCHIF   $AECADJCMMODE   &AECADJ99	; process only mode 1,2,3
/ICDHCMD wc=4,w1=0x91,w2=0x1D08,w3=0x015A,w4=0x02BC,w5=0x1D21
;#BRANCHGT   $AECADJCMMODE   3             &AECADJ99    
/ICDHCMD wc=5,w1=0x91,w2=0x1D0B,w3=0x01BA,w4=0x02BC,w5=0x0003,w6=0x1D21
;#
;#SETREG     $SHFTTEMPADD  $AECADJHI
/ICDHCMD wc=4,w1=0x91,w2=0x1D0F,w3=0x0140,w4=0x02C1,w5=0x02B8
;#SHIFT      $AECADJCMMODE $SHFTTEMPN $LITERAL1
/ICDHCMD wc=5,w1=0x91,w2=0x1D12,w3=0x018A,w4=0x02BC,w5=0x02C0,w6=0x082B
;#CALLQUE    $RSHFTN
/ICDHCMD wc=3,w1=0x91,w2=0x1D16,w3=0x01F8,w4=0x1D22
;#SETREG     $SHFTTEMPADD  $AECADJLO
/ICDHCMD wc=4,w1=0x91,w2=0x1D18,w3=0x0140,w4=0x02C1,w5=0x02BA
;#SHIFT      $AECADJCMMODE $SHFTTEMPN $LITERAL1
/ICDHCMD wc=5,w1=0x91,w2=0x1D1B,w3=0x018A,w4=0x02BC,w5=0x02C0,w6=0x082B
;#CALLQUE    $RSHFTN
/ICDHCMD wc=3,w1=0x91,w2=0x1D1F,w3=0x01F8,w4=0x1D22
#AECADJ99:  RTNQUE
/ICDHCMD wc=2,w1=0x91,w2=0x1D21,w3=0x01FA
;#
;#
;#
;# This is a multi-bit right shift routine that calls RSHFT1
;# The number of times indicated in $SHFTTEMPN
;# the address of the words to be shifted is in SHFTTEMPADD.
;#
;#RSHFTN:
;#COPYRI2D $SHFTTEMPADD $SHFTTEMP 2
/ICDHCMD wc=5,w1=0x91,w2=0x1D22,w3=0x01AC,w4=0x02C1,w5=0x02BD,w6=0x0002
;#RSHFTN_10:
;#BRANCHGT  $SHFTTEMPN  0  &RSHFTN_20
/ICDHCMD wc=5,w1=0x91,w2=0x1D26,w3=0x01BA,w4=0x02C0,w5=0x0000,w6=0x1D2F
;#COPYRD2I $SHFTTEMP $SHFTTEMPADD 2
/ICDHCMD wc=5,w1=0x91,w2=0x1D2A,w3=0x01AA,w4=0x02BD,w5=0x02C1,w6=0x0002
;#RTNQUE    
/ICDHCMD wc=2,w1=0x91,w2=0x1D2E,w3=0x01FA
;#RSHFTN_20:
;#CALLQUE   &RSHFT1
/ICDHCMD wc=3,w1=0x91,w2=0x1D2F,w3=0x01F8,w4=0x1D36
;#ADDREGD   $SHFTTEMPN -1
/ICDHCMD wc=4,w1=0x91,w2=0x1D31,w3=0x01BC,w4=0x02C0,w5=0xFFFF
;#GOTO      &RSHFTN_10
/ICDHCMD wc=3,w1=0x91,w2=0x1D34,w3=0x0156,w4=0x1D26
;#
;# This is the routine that performs a single bit right shift
;# of the 32 bit number in SHFTTEMP.
;#
;#
;#RSHFT1:
;#SHIFT    $SHFTTEMPLO $SHFTTEMPLO $LITERALMINUS1
/ICDHCMD wc=5,w1=0x91,w2=0x1D36,w3=0x018A,w4=0x02BD,w5=0x02BD,w6=0x0836
;#REGAND   $SHFTTEMPLO $LITERAL7FFF $SHFTTEMPLO
/ICDHCMD wc=5,w1=0x91,w2=0x1D3A,w3=0x0150,w4=0x02BD,w5=0x083E,w6=0x02BD
;#REGAND   $SHFTTEMPHI $LITERAL1 $SHFTTEMPXX
/ICDHCMD wc=5,w1=0x91,w2=0x1D3E,w3=0x0150,w4=0x02BE,w5=0x082B,w6=0x02BF
;#BRANCHIF $SHFTTEMPXX &RSHFT1_10
/ICDHCMD wc=4,w1=0x91,w2=0x1D42,w3=0x015A,w4=0x02BF,w5=0x1D49
;#REGOR    $SHFTTEMPLO $LITERAL8000 $SHFTTEMPLO
/ICDHCMD wc=5,w1=0x91,w2=0x1D45,w3=0x2150,w4=0x02BD,w5=0x083D,w6=0x02BD
;#RSHFT1_10:
;#SHIFT    $SHFTTEMPHI $SHFTTEMPHI $LITERALMINUS1
/ICDHCMD wc=5,w1=0x91,w2=0x1D49,w3=0x018A,w4=0x02BE,w5=0x02BE,w6=0x0836
;#REGAND   $SHFTTEMPHI $LITERAL7FFF $SHFTTEMPHI
/ICDHCMD wc=5,w1=0x91,w2=0x1D4D,w3=0x0150,w4=0x02BE,w5=0x083E,w6=0x02BE
;#RTNQUE
/ICDHCMD wc=2,w1=0x91,w2=0x1D51,w3=0x01FA
;#
;# This section adds to literals to the literals section
;#
;#  Generate the (register) address of the literals section.
;#
;#.RORG P1_P2 0x800
;#REGDEF $P1_P2        SHARE   
;#REGEQU $SHARE+42     LITERALS
;#REGEQU $LITERALS+1   LITERAL1
;#REGEQU $LITERALS+12  LITERALMINUS1
;#REGEQU $LITERALS+16  LITERAL7
;#REGEQU $LITERALS+18  LITERALMINUS13
;#REGEQU $LITERALS+19  LITERAL8000
;#REGEQU $LITERALS+20  LITERAL7FFF
;#
;# Generate the queue address of the set literals code.
;#.ORG 0x7EB
;#SETREGS $LITERALS+16 8  7 0x40 -13 0x8000 0x7FFF 0 0 0 
/ICDHCMD wc=5,w1=0x91,w2=0x07EB,w3=0x01B2,w4=0x083A,w5=0x0008,w6=0x0007
/ICDHCMD wc=5,w1=0x91,w2=0x07EF,w3=0x0040,w4=0xFFF3,w5=0x8000,w6=0x7FFF
/ICDHCMD wc=4,w1=0x91,w2=0x07F3,w3=0x0000,w4=0x0000,w5=0x0000
;#
;#
;#
;# This just gets me an address.
;#
;#.ORG 0x1E3D
;#HssOutSub:
;#
;#  This section changes the version to 12d
;#
;#.RORG  INT3_OUT 0x0070
;#REGBLK $INT3_OUT INT3_OUTPUTBLOCK[16]
;#REGEQU $INT3_OUTPUTBLOCK INT3_VRPN
;#.ORG 0x1E43
;#SETREG $INT3_VRPN 0x12D
/ICDHCMD wc=4,w1=0x91,w2=0x1E43,w3=0x0140,w4=0x0070,w5=0x012D
;#
;#=======================================================
;#=======================================================
;#
;#
;# Enable Queue
/ICDHLDIN  wc=1, w1=0x0136

;# Run initialization code
/icdhldin wc=2,w1=0x152,w2=5

SHOVAL "PROCEDURE TI_DHC_QP12D IS COMPLETE"
return
ENDPROC